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    Calculates locally in your browser · loaded and unloaded output
    Circuit design / passive networks

    Voltage divider

    Solve a two-resistor divider with the load taken into account, not just the textbook open-circuit ratio. The error introduced by the load and the Thévenin output impedance are reported so you can size the divider properly.

    Current0.83 mADissipation9.9 mWLoadingModerate
    Output voltage
    3.7179 V
    With the load connected
    Unloaded output
    3.8367 V
    Open-circuit divider output
    Divider ratio
    31.97%
    R₂ / (R₁ + R₂)
    Load error
    -3.10%
    How much the load pulls the output down
    Divider operating point
    Unloaded and loaded output, the current drawn, and the power in each element.
    32.0% ratio
    Divider operating point
    QuantityValueBasis
    Input voltage12.000 VSource
    Output, no load3.8367 VR₂/(R₁+R₂) = 0.3197
    Output, loaded3.7179 VR₂‖R_L = 4489 Ω
    Load error-3.10%Deviation from the unloaded value
    Divider current0.828 mAThrough R₁ and the R₂‖R_L pair
    Power in R₁6.86 mWI²R₁
    Power in R₂3.08 mWI²(R₂‖R_L)
    Thévenin resistance3197 ΩR₁‖R₂ — the source impedance seen by the load

    A stiff divider wastes current; a high-impedance divider is easily disturbed by the load. The Thévenin resistance is the figure of merit for that trade-off.

    Inspect the model
    Choose a quick result view, a scaled comparison, or the complete diagnostic set.
    Output vs load resistance
    As the load approaches the Thévenin resistance, the output collapses.
    Output vs load resistance0.0000.9051.812.723.624.530.1161001000.9141k1k2.9110k10k3.72100k100k3.821000k1000k3.8410000k10000kV out (V)
    Transfer characteristic
    Loaded output as R₂ sweeps across three decades.
    Transfer characteristic0.0002.695.388.0610.7513.441001004704701k1k4.7k4.7k10k10k47k47k100k100kV outV in
    Canonical equations
    The exact relationships implemented by this engine.

    V_out = V_in · R₂/(R₁+R₂) · exact only with no load

    R₂‖R_L = R₂R_L/(R₂+R_L) · the load appears in parallel with R₂

    I = V_in/(R₁ + R₂‖R_L) · shared by both branches

    R_th = R₁‖R₂ · output impedance of the divider

    engineering methodology

    A clear path from inputs to results.

    A voltage divider sets an output voltage as a fraction of the input, but only exactly when nothing draws current from it. This engine reports both the open-circuit ratio and the loaded output, so the error from whatever the divider drives is visible rather than assumed away.

    Step-by-step methodWorked exampleAssumptions explained

    How to use

    1. Enter the input voltage.
    2. Set R₁, the series (top) resistor.
    3. Set R₂, the shunt (bottom) resistor.
    4. Enter the load resistance. Use a very large value to model an open circuit.
    5. Compare the unloaded and loaded outputs — the difference is the loading error.
    6. Check the Thévenin resistance: keep it well below the load for an accurate divider.

    The formula

    Vout=VinR2R1+R2,Vloaded=VinR2∥RLR1+R2∥RL,Rth=R1∥R2V_{\text{out}} = V_{\text{in}}\frac{R_2}{R_1+R_2}, \qquad V_{\text{loaded}} = V_{\text{in}}\frac{R_2 \parallel R_L}{R_1 + R_2 \parallel R_L}, \qquad R_{th} = R_1 \parallel R_2

    Reference: Thévenin equivalent of a resistive network; IEC 60038 for nominal low-voltage levels.

    Worked example

    12 V input, 10 kΩ and 4.7 kΩ, 100 kΩ load (default inputs)

    Inputs
    • Input 12 V.
    • R₁ = 10 kΩ, R₂ = 4.7 kΩ.
    • Load 100 kΩ.
    Calculation path
    1. 1

      Divider ratio: 4,700 / 14,700 = 31.97%.

    2. 2

      Unloaded output: 12 × 0.3197 = 3.837 V.

    3. 3

      R₂ in parallel with 100 kΩ is 4,485 Ω, so the loaded output is 3.718 V.

    4. 4

      Loading error: −3.10%.

    5. 5

      Thévenin resistance: 10 kΩ ‖ 4.7 kΩ = 3,197 Ω.

    Result

    Unloaded 3.837 V · loaded 3.718 V · error −3.10% · output impedance 3.2 kΩ.

    Interpreting the result

    A 100 kΩ load pulls the output down by 3%. That is often acceptable, but if the load were 10 kΩ the error would be about 24% and the divider would be useless as a reference. The rule is to keep the divider current at least ten times the load current, which is equivalent to keeping R_th below a tenth of R_L.

    Assumptions & limitations

    • Resistors are ideal and exactly at their nominal values. A 1% pair contributes up to 2% of ratio error before loading.
    • The source has zero output impedance. A real source resistance adds to R₁ and shifts the ratio.
    • The load is purely resistive. Capacitive or inductive loads make the divider frequency dependent.
    • Temperature coefficients and self-heating are ignored.
    • No current is drawn by whatever measures the output — a meter with finite impedance loads the divider too.

    Frequently asked questions

    Why is my measured output lower than calculated?

    Almost always loading. The meter or circuit downstream has finite impedance in parallel with R₂, which lowers the effective shunt resistance. Compare the loaded and unloaded rows to quantify it.

    What is the Thévenin resistance for?

    It is the output impedance of the divider — the resistance the load sees looking back into the network. It sets how much the output sags under load, and it forms a low-pass filter with any cable capacitance.

    How does a potentiometer relate to this?

    A pot is a divider with a variable tap. The same loading equations apply, with R₁ and R₂ being the two segments either side of the wiper.

    How do I choose the resistor values?

    Pick the ratio first, then scale both resistors to set the current. Lower values give a stiffer divider but waste more power; higher values save power but are more easily disturbed by the load.

    Can I use a divider to power something?

    Only for very light loads. A divider is a reference, not a supply: it wastes current continuously and its output collapses as load current rises. Use a regulator or a buffer for real loads.

    Does this work for AC?

    Only at low frequency with resistive loads. At higher frequencies the parasitic capacitance across each resistor and the load reactance change the division ratio.

    Methodology last reviewed 2026-10-18. Results are informational and not financial or engineering advice — see our disclaimer.